The invention relates generally to integrated circuits and, in particular, to device structures for a field-effect transistor with a body contact and methods of forming such device structures.
Complementary-metal-oxide-semiconductor (CMOS) processes may be used to build a combination of p-type field-effect transistors (PFETs) and n-type field-effect transistors (nFETs) that are coupled to implement logic gates and other types of integrated circuits, such as switches. Field-effect transistors generally include an active semiconductor region, a source and a drain defined in the active semiconductor region, and a gate electrode associated with a channel in the active semiconductor region. When a control voltage exceeding a designated threshold voltage is applied to the gate electrode, carrier flow occurs in an inversion or depletion layer in the channel between the source and drain to produce a device output current.
Semiconductor-on-insulator (SOI) substrates may be advantageous in CMOS technology. In comparison with field-effect transistors built using a bulk silicon wafer, a semiconductor-on-insulator substrate permits operation at significantly higher speeds with improved electrical isolation and reduced electrical losses. Contingent on the thickness of the device layer of the SOI substrate, a field-effect transistor may operate in a partially-depleted mode in which the depletion layer in the channel in the device layer does not extend fully to the buried oxide layer when typical control voltages are applied to the gate electrode.
Partially-depleted SOI field-effect transistors may be fabricated with two types, namely floating-body SOI field-effect transistors or body-contacted SOI field-effect transistors. A floating-body SOI field-effect transistor conserves device area due to its comparatively small size, but suffers from the floating body effect due to the absence of a body contact. A floating-body SOI field-effect transistor may be unstable during operation, especially when operating in an RF circuit or a high speed digital circuit, because the threshold voltage is a function of a fluctuating body voltage. A body-contacted SOI field-effect transistor includes a body contact that may eliminate body effects. However, a body-contacted SOI field-effect transistor covers more chip area than a floating-body SOI field-effect transistor, which reduces the density of a circuit built using body-contacted SOI field-effect transistors in comparison with a circuit built using floating-body SOI field-effect transistors.
In connection with SOI switches and low noise amplifiers, a polysilicon T-body contact design may be used to provide body-contacted SOI field-effect transistors. However, such polysilicon T-body contact designs increase both area and capacitance, which results in lower linearity for harmonic distortion in a switch and lower linearity for gain in a low noise amplifier. The polysilicon T-body contact design also reduces the device density in switches and low noise amplifiers, as well as the device density of body-contacted SOI field-effect transistors used in digital logic.
Improved device structures for a body-contacted SOI field-effect transistor and methods of forming such device structures are needed.